vishay siliconix si1032r/x document number: 71172 s10-2544-rev. f, 08-nov-10 www.vishay.com 1 n-channel 1.5 v (g-s) mosfet features ? halogen-free according to iec 61249-2-21 definition ? low-side switching ? low on-resistance: 5 ? ? low threshold: 0.9 v (typ.) ? fast switching speed: 35 ns ? trenchfet ? power mosfets: 1.5 v rated ? 2000 v esd protection ? compliant to rohs directive 2002/95/ec benefits ? ease in driving switches ? low offset (error) voltage ? low-voltage operation ? high-speed circuits ? low battery voltage operation applications ? drivers: relays, solenoids, lamps, hammers, displays, memories ? battery oper ated systems ? power supply converter circuits ? load/power switching cell phones, pagers product summary v ds (v) r ds(on) ( ? )i d (ma) 20 5 at v gs = 4.5 v 200 7 at v gs = 2.5 v 175 9 at v gs = 1.8 v 150 10 at v gs = 1.5 v 50 orderin g information: si1032r-t1-ge3 (sc-75a, lead (p b )-free and halogen-free) si1032x-t1-ge3 (sc- 8 9, lead (p b )-free -free halogen-free) top v ie w 2 1 s d g 3 markin g code: g sc-75a or sc-89 notes: a. surface mounted on fr4 board. absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol si1032r si1032x unit 5 s steady state 5 s steady state drain-source voltage v ds 20 v gate-source voltage v gs 6 continuous drain current (t j = 150 c) a t a = 25 c i d 200 140 210 200 ma t a = 85 c 110 100 150 140 pulsed drain current a i dm 500 600 continuous source current (diode conduction) a i s 250 200 300 240 maximum power dissipation a for sc-75 t a = 25 c p d 280 250 340 300 mw t a = 85 c 145 130 170 150 operating junction and storage temperature range t j , t stg - 55 to 150 c gate-source esd rating (hbm, method 3015) esd 2000 v
www.vishay.com 2 document number: 71172 s10-2544-rev. f, 08-nov-10 vishay siliconix si1032r/x notes: a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. typical characteristics (t a = 25 c, unless otherwise noted) specifications (t a = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static gate threshold voltage v gs(th) v ds = v gs , i d = 250 a 0.40 0.7 1.2 v gate-body leakage i gss v ds = 0 v, v gs = 2.8 v 0.5 1.0 a v ds = 0 v, v gs = 4.5 v 1.0 3.0 zero gate voltage drain current i dss v ds = 20 v, v gs = 0 v 1 v ds = 20 v, v gs = 0 v, t j = 55 c 10 on-state drain current a i d(on) v ds = 5 v, v gs = 4.5 v 250 ma drain-source on-state resistance a r ds(on) v gs = 4.5 v, i d = 200 ma 5 ? v gs = 2.5 v, i d = 175 ma 7 v gs = 1.8 v, i d = 150 ma 9 v gs = 1.5 v, i d = 40 ma 10 forward transconductance a g fs v ds = 10 v, i d = 200 ma 0.5 s diode forward voltage a v sd i s = 150 ma, v gs = 0 v 1.2 v dynamic b total gate charge q g v ds = 10 v, v gs = 4.5 v, i d = 250 ma 750 pc gate-source charge q gs 75 gate-drain charge q gd 225 tu r n - o n d e l ay t i m e t d(on) v dd = 10 v, r l = 47 ? i d ? 200 ma, v gen = 4.5 v, r g = 10 ? 50 ns rise time t r 25 turn-off delay time t d(off) 50 fall time t f 25 output characteristics 0.0 0.1 0.2 0.3 0.4 0.5 0123456 v ds - drain-to-so u rce v oltage ( v ) - drain c u rrent (a) i d v gs = 5 v thr u 1. 8 v 1 v transfer characteristics 0 100 200 300 400 500 600 0.0 0.5 1.0 1.5 2.0 2.5 v gs - gate-to-so u rce v oltage ( v ) - drain c u rrent (ma) i d t j = - 55 c 125 c 25 c
document number: 71172 s10-2544-rev. f, 08-nov-10 www.vishay.com 3 vishay siliconix si1032r/x typical characteristics (t a = 25 c, unless otherwise noted) on-resistance vs. drain current gate charge surge-drain diode forward voltage - on-resistance ( ) r ds(on) 0 10 20 30 40 50 0 50 100 150 200 250 i d - drain c u rrent (ma) v gs = 1. 8 v v gs = 4.5 v v gs = 2.5 v 0 1 2 3 4 5 0.0 0.2 0.4 0.6 0. 8 - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v gs v ds = 10 v i d = 150 ma 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 1.4 1000 1 v sd ) v ( e g a t l o v n i a r d - o t - e c r u o - s - so u rce c u rrent (ma) i s t j = 125 c t j = 25 c t j = 50 c 10 100 capacitance on-resistance vs. junction temperature on-resistance vs. gate-to-source voltage 0 20 40 60 8 0 100 04 8 12 16 20 v ds - drain-to-so u rce v oltage ( v ) c rss c oss c iss v gs = 0 v f = 1 mhz c - capacitance (pf) 0.60 0. 8 0 1.00 1.20 1.40 1.60 - 50 - 25 0 25 50 75 100 125 v gs = 4.5 v i d = 200 ma t j - j u nction temperat u re (c) v gs = 1. 8 v i d = 175 ma r ds(on) - on-resistance ( n ormalized) 0 10 20 30 40 50 0123456 i d = 175 ma - on-resistance ( ) r ds(on) v gs - gate-to-so u rce v oltage ( v ) i d = 200 ma
www.vishay.com 4 document number: 71172 s10-2544-rev. f, 08-nov-10 vishay siliconix si1032r/x typical characteristics (t a = 25 c, unless otherwise noted) vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71172 . threshold voltage variance vs. temperature - 0.3 - 0.2 - 0.1 0.0 0.1 0.2 0.3 - 50 - 25 0 25 50 75 100 125 i d = 0.25 ma v ariance ( v ) v gs(th) t j - temperat u re (c) i gss vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 - 50 - 25 0 25 50 75 100 125 t j - temperat u re (c) i gss - ( a) v gs = 2. 8 v bv gss vs. temperature 0 1 2 3 4 5 6 7 - 50 - 25 0 25 50 75 100 125 t j - temperat u re (c) b v gss - gate-to-so u rce breakdo w n v oltage ( v ) normalized thermal transient impedance, junction-to-ambient (sc-75a, si1032r only) 10 -3 10 -2 0 0 6 0 1 1 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single p u lse d u ty cycle = 0.5 sq u are w a v e p u lse d u ration (s) n ormalized effecti v e transient thermal impedance 1. d u ty cycle, d = 2. per unit base = r thja = 500 c/ w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 n otes: 4. s u rface mo u nted p dm
package information www.vishay.com vishay siliconix revision: 08-aug-11 1 document number: 71348 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 sc-75a: 3-leads notes dimensions in millimeters will govern. 1. dimension d does not include mold flash, protrusions or gate burrs. mold flash protrusions or gate burrs shall not exceed 0.10 mm per end. dimension e1 does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.10 mm per side. 2. dimensions d and e1 are determi ned at the outmost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interelead flash, but includi ng any mismatch between the top and bottom of the plastic body. 3. datums a, b and d to be determined 0.10 mm from the lead tip. 4. terminal positions are shown for reference only. 5. these dimensions apply to the flat section of the lead between 0.08 mm and 0.15 mm from the lead tip. c m b a ? 2x 1 2 3 a 1 2 d c bbb 4 b 3 d 3 d d d bbb d bbb d e2 b1( b 1) 3 e1 2xb1 e1 2x e3 2 e e/2 d bbb 4x d seating plane a a2 a1 base metal with tin planting section b-b 5 b1 b 1 c c1 l2 l l1 b b 2x 1 ddd c c 1 1 dimensions tolerances aaa 0.10 bbb 0.10 ccc 0.10 ddd 0.10 millimeters dim. min. nom. max. note a- -0.80 a 1 0.00 - 0.10 a 2 0.65 0.70 0.80 b 1 0.19 - 0.24 5 b 1 0.17 - 0.21 c 0.13 - 0.15 5 c 1 0.10 - 0.12 5 d 1.48 1.575 1.68 1, 2 e 1.50 1.60 1.70 e 1 0.66 0.76 0.86 1, 2 e 1 0.50 bsc e 2 1.00 bsc e 3 0.50 bsc l 0.15 0.205 0.30 l 1 0.40 ref l 2 0.15 bsc ? 0 - 8 ? 1 4 - 10 ecn: e11-2210-rev. d, 08-aug-11 d w g: 5868
d 3 2 b 1 e1 e a c l h e x detail x package information vishay siliconix document number: 71377 06-jul-01 www.vishay.com 1
dim min max min max a 0.60 0.80 0.024 0.031 b 0.23 0.33 0.009 0.013 c 0.10 0.20 0.004 0.008 d 1.50 1.70 0.059 0.067 e 0.75 0.95 0.030 0.037 e 1.00 bsc 0.040 bsc e 1 0.50 bsc 0.020 bsc h 1.50 1.70 0.059 0.067 l 0.30 0.50 0.012 0.020 ecn: s-03946?rev. b, 09-jul-01 dwg: 5869
application note 826 vishay siliconix document number: 72603 www.vishay.com revision: 21-jan-08 19 application note recommended minimum pads for sc-75a: 3-lead 0.014 (0.356) 0.071 (1.803) recommended mi nimum pads dimensions in inches/(mm) 0.264 (0.660) 0.054 (1.372) 0.031 (0.798) 0.020 (0.503) return to index return to index
application note 826 vishay siliconix www.vishay.com document number: 72604 20 revision: 21-jan-08 application note recommended minimum pads for sc-89: 3-lead recommended minimum pads for sc-89: 3-lead 0.0200 (0.51 ) 0.0150 (0.38 ) 0.0250 (0.64 ) 0.0150 (0.38 ) 0.0550 (1.40 ) 0.0690 (1.75 ) 0.0170 (0.43 ) 0.0260 (0.66 ) recommended mi nimum pads dimensions in inches/(mm) return to index ) ) ) ) ) ) ) ) return to index
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